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  ? semiconductor components industries, llc, 2006 march, 2006 ? rev. 7 1 publication order number: mc74ac257/d mc74ac257, mc74act257 quad 2?input multiplexer with 3?state outputs the mc74ac257/74act257 is a quad 2 ? input multiplexer with 3 ? state outputs. four bits of data from two sources can be selected using a common data select input. the four outputs present the selected data in true (noninverted) form. the outputs may be switched to a high impedance state by placing a logic high on the common output enable (oe ) input, allowing the outputs to interface directly with bus ? oriented systems. ? multiplexer expansion by tying outputs together ? noninverting 3 ? state outputs ? outputs source/sink 24 ma ? act257 has ttl compatible inputs  these devices are available in pb ? free package(s). specifications herein apply to both standard and pb ? free devices. please see our website at www.onsemi.com for specific pb ? free orderable part numbers, or contact your local on semiconductor sales office or representative. 15 16 14 13 12 11 10 2 1 34567 v cc 9 8 oe i 0c i 1c z c i 0d i 1d z d si 0a i 1a z a i 0b i 1b z b gnd figure 1. pinout: 16 ? lead packages conductors (top view) http://onsemi.com dip ? 16 n suffix case 648 1 16 so ? 16 d suffix case 751b 1 16 device package shipping ordering information mc74ac257n pdip ? 16 25 units/rail mc74ac257d soic ? 16 48 units/rail mc74ac257dr2 2500 tape & reel tssop ? 16 dt suffix case 948f mc74ac257dt tssop ? 16 96 units/rail mc74ac257dtr2 tssop ? 16 soic ? 16 2500 tape & reel mc74act257n pdip ? 16 25 units/rail mc74act257d soic ? 16 48 units/rail mc74act257dr2 2500 tape & reel mc74act257dt tssop ? 16 96 units/rail mc74act257dtr2 tssop ? 16 soic ? 16 2500 tape & reel 1 16 see general marking information in the device marking section on page 8 of this data sheet. device marking information 1 16 eiaj ? 16 m suffix case 966 mc74ac257mel eiaj ? 16 2000 tape & reel mc74act257m eiaj ? 16 mc74act257mel eiaj ? 16 2000 tape & reel 50 units/rail
mc74ac257, mc74act257 http://onsemi.com 2 pin name pin function s common data select input oe 3 ? state output enable input i 0a ? i 0d data inputs from source 0 i 1a ? i 1d data inputs from source 1 z a ? z d 3 ? state multiplexer outputs truth table output enable select input data inputs outputs oe s i 0 i 1 z h x x x z l h x ll l h x hh l l l xl l l h x h h = high voltage level l = low voltage level x = immaterial z = high impedance figure 2. logic symbol s oe i 0a i 1a i 0b i 1b z b i 0c i 1c i 0d i 1d z a z c z d functional description the mc74ac257/74act257 is a quad 2 ? input multiplexer with 3 ? state outputs. it selects four bits of data from two sources under control of a common data select input. when the select input is low, the i 0x inputs are selected and when select is high, the i 1x inputs are selected. the data on the selected inputs appears at the outputs in true (noninverted) form. the device is the logic implementation of a 4 ? pole, 2 ? position switch where the position of the switch is determined by the logic levels supplied to the select input. the logic equations for the outputs are shown below: z a = oe ? (i 1a ? s+i 0a ? s ) z b = oe ? (i 1b ? s+i 0b ? s ) z c = oe ? (i 1c ? s+i 0c ? s ) z d = oe ? (i 1d ? s+i 0d ? s ) when the output enable input (oe ) is high, the outputs are forced to a high impedance state. if the outputs are tied together, all but one device must be in the high impedance state to avoid high currents that would exceed the maximum ratings. designers should ensure the output enable signals to 3 ? state devices whose outputs are tied together are designed so there is no overlap.
mc74ac257, mc74act257 http://onsemi.com 3 note: this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. oe i 0a i 1a i 0b i 1b i 0c i 1c i 0d i 1d s z a z b z c z d figure 3. logic diagram
mc74ac257, mc74act257 http://onsemi.com 4 maximum ratings* symbol parameter value unit v cc dc supply voltage (referenced to gnd) ? 0.5 to +7.0 v v in dc input voltage (referenced to gnd) ? 0.5 to v cc +0.5 v v out dc output voltage (referenced to gnd) ? 0.5 to v cc +0.5 v i in dc input current, per pin 20 ma i out dc output sink/source current, per pin 50 ma i cc dc v cc or gnd current per output pin 50 ma t stg storage temperature ? 65 to +150 c *maximum ratings are those values beyond which damage to the device may occur. functional operation should be restricted to the recom- mended operating conditions. recommended operating conditions symbol parameter min typ max unit v cc supply voltage ac 2.0 5.0 6.0 v act 4.5 5.0 5.5 v in , v out dc input voltage, output voltage (ref. to gnd) 0 ? v cc v t r , t f input rise and fall time (note 1) ac devices except schmitt inputs v cc @ 3.0 v ? 150 ? v cc @ 4.5 v ? 40 ? ns/v v cc @ 5.5 v ? 25 ? t r , t f input rise and fall time (note 2) act devices except schmitt inputs v cc @ 4.5 v ? 10 ? ns/v v cc @ 5.5 v ? 8.0 ? t j junction temperature (pdip) ? ? 140 c t a operating ambient temperature range ? 40 25 85 c i oh output current ? high ? ? ? 24 ma i ol output current ? low ? ? 24 ma 1. 1. v in from 30% to 70% v cc ; see individual data sheets for devices that differ from the typical input rise and fall times. 2. 2. v in from 0.8 v to 2.0 v; see individual data sheets for devices that differ from the typical input rise and fall times.
mc74ac257, mc74act257 http://onsemi.com 5 dc characteristics symbol parameter v cc (v) 74ac 74ac unit conditions t a = +25 c t a = ? 40 c to +85 c typ guaranteed limits v ih minimum high level input voltage 3.0 1.5 2.1 2.1 v out = 0.1 v 4.5 2.25 3.15 3.15 v or v cc ? 0.1 v 5.5 2.75 3.85 3.85 v il maximum low level input voltage 3.0 1.5 0.9 0.9 v out = 0.1 v 4.5 2.25 1.35 1.35 v or v cc ? 0.1 v 5.5 2.75 1.65 1.65 v oh minimum high level output voltage 3.0 2.99 2.9 2.9 i out = ? 50  a 4.5 4.49 4.4 4.4 v 5.5 5.49 5.4 5.4 v *v in = v il or v ih 3.0 ? 2.56 2.46 ? 12 ma 4.5 ? 3.86 3.76 i oh ? 24 ma 5.5 ? 4.86 4.76 ? 24 ma v ol maximum low level output voltage 3.0 0.002 0.1 0.1 i out = 50  a 4.5 0.001 0.1 0.1 v 5.5 0.001 0.1 0.1 v *v in = v il or v ih 3.0 ? 0.36 0.44 12 ma 4.5 ? 0.36 0.44 i ol 24 ma 5.5 ? 0.36 0.44 24 ma i in maximum input leakage current 5.5 ? 0.1 1.0  a v i = v cc , gnd i oz maximum 3 ? state current v i (oe) = v il , v ih 5.5 ? 0.5 5.0  a v i = v cc , gnd v o = v cc , gnd i old ?minimum dynamic output current 5.5 ? ? 75 ma v old = 1.65 v max i ohd 5.5 ? ? ? 75 ma v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 ? 8.0 80  a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. ?maximum test duration 2.0 ms, one output loaded at a time. note: i in and i cc @ 3.0 v are guaranteed to be less than or equal to the respective limit @ 5.5 v v cc .
mc74ac257, mc74act257 http://onsemi.com 6 ac characteristics (for figures and waveforms ? see section 3 of the on semiconductor fact data book, dl138/d) symbol parameter v cc * (v) 74ac 74ac unit fig. no. t a = +25 c c l = 50 pf t a = ? 40 c to +85 c c l = 50 pf min typ max min max t plh propagation delay 3.3 1.5 5.0 8.5 1.0 9.0 ns 3 ? 5 i n to z n 5.0 1.5 4.0 6.0 1.0 7.0 t phl propagation delay 3.3 1.5 6.0 8.5 1.0 9.0 ns 3 ? 5 i n to z n 5.0 1.5 4.5 6.0 1.0 7.0 t plh propagation delay 3.3 1.5 7.0 10.5 1.5 11.5 ns 3 ? 6 s to z n 5.0 1.5 5.0 7.5 1.0 8.5 t phl propagation delay 3.3 1.5 7.5 10.5 1.5 11.5 ns 3 ? 6 s to z n 5.0 1.5 5.5 7.5 1.0 8.5 t pzh output enable time 3.3 1.5 6.5 9.5 1.0 10.5 ns 3 ? 7 5.0 1.5 5.0 7.5 1.0 8.5 t pzl output enable time 3.3 1.5 5.5 9.0 1.0 10.0 ns 3 ? 8 5.0 1.5 5.0 8.5 1.0 9.5 t phz output disable time 3.3 1.5 5.5 10.0 1.0 11.0 ns 3 ? 7 5.0 1.5 5.0 9.0 1.0 10.0 t plz output disable time 3.3 1.5 5.5 9.0 1.0 10.0 ns 3 ? 8 5.0 1.5 5.0 8.0 1.0 9.0 *voltage range 3.3 v is 3.3 v 0.3 v. *voltage range 5.0 v is 5.0 v 0.5 v.
mc74ac257, mc74act257 http://onsemi.com 7 dc characteristics symbol parameter v cc (v) 74act 74act unit conditions t a = +25 c t a = ? 40 c to +85 c typ guaranteed limits v ih minimum high level input voltage 4.5 1.5 2.0 2.0 v v out = 0.1 v 5.5 1.5 2.0 2.0 or v cc ? 0.1 v v il maximum low level input voltage 4.5 1.5 0.8 0.8 v v out = 0.1 v 5.5 1.5 0.8 0.8 or v cc ? 0.1 v v oh minimum high level output voltage 4.5 4.49 4.4 4.4 v i out = ? 50  a 5.5 5.49 5.4 5.4 *v in = v il or v ih 4.5 ? 3.86 3.76 v i oh ? 24 ma 5.5 ? 4.86 4.76 ? 24 ma v ol maximum low level output voltage 4.5 0.001 0.1 0.1 v i out = 50  a 5.5 0.001 0.1 0.1 *v in = v il or v ih 4.5 ? 0.36 0.44 v i ol 24 ma 5.5 ? 0.36 0.44 24 ma i in maximum input leakage current 5.5 ? 0.1 1.0  a v i = v cc , gnd  i cct additional max. i cc /input 5.5 0.6 ? 1.5 ma v i = v cc ? 2.1 v i oz maximum 3 ? state current v i (oe) = v il , v ih 5.5 ? 0.5 5.0  a v i = v cc , gnd v o = v cc , gnd i old ?minimum dynamic output current 5.5 ? ? 75 ma v old = 1.65 v max i ohd 5.5 ? ? ? 75 ma v ohd = 3.85 v min i cc maximum quiescent supply current 5.5 ? 8.0 80  a v in = v cc or gnd *all outputs loaded; thresholds on input associated with output under test. ?maximum test duration 2.0 ms, one output loaded at a time.
mc74ac257, mc74act257 http://onsemi.com 8 ac characteristics (for figures and waveforms ? see section 3 of the on semiconductor fact data book, dl138/d) symbol parameter v cc * (v) 74act 74act unit fig. no. t a = +25 c c l = 50 pf t a = ? 40 c to +85 c c l = 50 pf min typ max min max t plh propagation delay i n to z n 5.0 1.5 5.0 7.0 1.0 7.5 ns 3 ? 6 t phl propagation delay i n to z n 5.0 2.0 6.0 7.5 1.5 8.5 ns 3 ? 6 t plh propagation delay s to z n 5.0 2.0 7.0 9.5 1.5 10.5 ns 3 ? 6 t phl propagation delay s to z n 5.0 2.5 7.0 10.5 2.0 11.5 ns 3 ? 6 t pzh output enable time 5.0 2.0 6.0 8.0 1.5 9.0 ns 3 ? 7 t pzl output enable time 5.0 2.0 6.0 8.0 1.5 9.0 ns 3 ? 8 t phz output disable time 5.0 2.5 6.5 9.0 1.5 10.0 ns 3 ? 7 t plz output disable time 5.0 2.0 6.0 7.5 1.5 8.5 ns 3 ? 8 *voltage range 5.0 v is 5.0 v 0.5 v. capacitance symbol parameter value typ unit test conditions c in input capacitance 4.5 pf v cc = 5.0 v c pd power dissipation capacitance 50 pf v cc = 5.0 v marking diagrams a = assembly location wl, l = wafer lot yy, y = year ww, w = work week ac257 awlyww mc74ac257n awlyyww ac 257 alyw act257 awlyww act 257 alyw mc74act257n awlyyww dip ? 16 so ? 16 tssop ? 16 eiaj ? 16 74ac257 alyw 74act257 alyw
mc74ac257, mc74act257 http://onsemi.com 9 package dimensions notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: inch. 3. dimension l to center of leads when formed parallel. 4. dimension b does not include mold flash. 5. rounded corners optional. ? a ? b f c s h g d j l m 16 pl seating 18 9 16 k plane ? t ? m a m 0.25 (0.010) t dim min max min max millimeters inches a 0.740 0.770 18.80 19.55 b 0.250 0.270 6.35 6.85 c 0.145 0.175 3.69 4.44 d 0.015 0.021 0.39 0.53 f 0.040 0.70 1.02 1.77 g 0.100 bsc 2.54 bsc h 0.050 bsc 1.27 bsc j 0.008 0.015 0.21 0.38 k 0.110 0.130 2.80 3.30 l 0.295 0.305 7.50 7.74 m 0 10 0 10 s 0.020 0.040 0.51 1.01     pdip ? 16 n suffix 16 pin plastic dip package case 648 ? 08 issue r notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions a and b do not include mold protrusion. 4. maximum mold protrusion 0.15 (0.006) per side. 5. dimension d does not include dambar protrusion. allowable dambar protrusion shall be 0.127 (0.005) total in excess of the d dimension at maximum material condition. 18 16 9 seating plane f j m r x 45  g 8 pl p ? b ? ? a ? m 0.25 (0.010) b s ? t ? d k c 16 pl s b m 0.25 (0.010) a s t dim min max min max inches millimeters a 9.80 10.00 0.386 0.393 b 3.80 4.00 0.150 0.157 c 1.35 1.75 0.054 0.068 d 0.35 0.49 0.014 0.019 f 0.40 1.25 0.016 0.049 g 1.27 bsc 0.050 bsc j 0.19 0.25 0.008 0.009 k 0.10 0.25 0.004 0.009 m 0 7 0 7 p 5.80 6.20 0.229 0.244 r 0.25 0.50 0.010 0.019  so ? 16 d suffix 16 pin plastic soic package case 751b ? 05 issue j
mc74ac257, mc74act257 http://onsemi.com 10 package dimensions tssop ? 16 dt suffix 16 pin plastic tssop package case948f ? 01 issue o ??? ??? dim min max min max inches millimeters a 4.90 5.10 0.193 0.200 b 4.30 4.50 0.169 0.177 c ??? 1.20 ??? 0.047 d 0.05 0.15 0.002 0.006 f 0.50 0.75 0.020 0.030 g 0.65 bsc 0.026 bsc h 0.18 0.28 0.007 0.011 j 0.09 0.20 0.004 0.008 j1 0.09 0.16 0.004 0.006 k 0.19 0.30 0.007 0.012 k1 0.19 0.25 0.007 0.010 l 6.40 bsc 0.252 bsc m 0 8 0 8 notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimension a does not include mold flash. protrusions or gate burrs. mold flash or gate burrs shall not exceed 0.15 (0.006) per side. 4. dimension b does not include interlead flash or protrusion. interlead flash or protrusion shall not exceed 0.25 (0.010) per side. 5. dimension k does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the k dimension at maximum material condition. 6. terminal numbers are shown for reference only. 7. dimension a and b are to be determined at datum plane ?w?.  section n ? n seating plane ident. pin 1 1 8 16 9 detail e j j1 b c d a k k1 h g ? u ? s u 0.15 (0.006) t s u 0.15 (0.006) t s u m 0.10 (0.004) v s t 0.10 (0.004) ? t ? ? v ? ? w ? 0.25 (0.010) 16x ref k n n eiaj ? 16 m suffix 16 pin plastic eiaj package case966 ? 01 issue o h e a 1 dim min max min max inches ??? 2.05 ??? 0.081 millimeters 0.05 0.20 0.002 0.008 0.35 0.50 0.014 0.020 0.18 0.27 0.007 0.011 9.90 10.50 0.390 0.413 5.10 5.45 0.201 0.215 1.27 bsc 0.050 bsc 7.40 8.20 0.291 0.323 0.50 0.85 0.020 0.033 1.10 1.50 0.043 0.059 0 0.70 0.90 0.028 0.035 ??? 0.78 ??? 0.031 a 1 h e q 1 l e  10  0  10  l e q 1  notes: 1. dimensioning and tolerancing per ansi y14.5m, 1982. 2. controlling dimension: millimeter. 3. dimensions d and e do not include mold flash or protrusions and are measured at the parting line. mold flash or protrusions shall not exceed 0.15 (0.006) per side. 4. terminal numbers are shown for reference only. 5. the lead width dimension (b) does not include dambar protrusion. allowable dambar protrusion shall be 0.08 (0.003) total in excess of the lead width dimension at maximum material condition. dambar cannot be located on the lower radius or the foot. minimum space between protrusions and adjacent lead to be 0.46 ( 0.018). m l detail p view p c a b e m 0.13 (0.005) 0.10 (0.004) 1 16 9 8 d z e a b c d e e l m z
mc74ac257, mc74act257 http://onsemi.com 11 notes
mc74ac257, mc74act257 http://onsemi.com 12 notes on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada japan : on semiconductor, japan customer focus center 2 ? 9 ? 1 kamimeguro, meguro ? ku, tokyo, japan 153 ? 0051 phone : 81 ? 3 ? 5773 ? 3850 mc74ac257/d literature fulfillment : literature distribution center for on semiconductor p.o. box 61312, phoenix, arizona 85082 ? 1312 usa phone : 480 ? 829 ? 7710 or 800 ? 344 ? 3860 toll free usa/canada fax : 480 ? 829 ? 7709 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : http://onsemi.com order literature : http://www.onsemi.com/litorder for additional information, please contact your local sales representative.


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